I had available captured records of the chaotic input as well as simulated chaotic signal generators to use as inputs. Hello Jim, The reason I did this with LTspice is that I wanted to analyze and test the behavior of a system with a very chaotic input, a very nonlinear digital "bad signal" detection algorithm and single go/no-go output. In short, you will spend a very large amount of effort for what is likely very little gain.
If you do this well, your top level schematic will look very much like a software flowchart. You will have to modify the hierarchical symbols that you will have LTspice create for you automatically to look like software flowchart symbols. Run the sampled and held analog through a lossless analog delay line with delay equal to the sample period. You will likely also need data that is one or more clock periods old. The A/Ds probably have enough bits so that you can ignore quantization effects. Incoming analog will probably be sampled and held (it's an a-device) at this rate (or perhaps a sub-harmonic rate). Set up a clock at this rate on the top schematic of the hierarchy. Your main working loop will probably run at some fixed rate from a few hundred Hertz to a few tens of kilohertz. For example, it is very easy to create a behavioral 1 of 4 or 1 of 8 low pass filter this way.
Between the actual code listing and flowchart, you should be able to dissect, understand then recreate a subroutine's behavior in LTspice. Software subroutines will become hierarchical sub-schematics in LTspice. Hello Xiaofu, The first step is to obtain or create a software flowchart (block diagram) of the code of interest (probably not including initialization or startup).